CDC7005 Status: ACTIVE

High Performance, Low Phase Noise, Low Skew Clock Synchronizer that Synchronizes Ref Clock to VCXO

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Datasheet

3.3-V High Performance Clock Synthesizer & Jitter Cleaner (Rev. L) (PDF 892 KB)
04 Jun 2009

	CDC7005
Temp Range(C)	S(-40 to 85)
Divider Ratio	1, 2, 4, 8, 16
Input Level	LVCMOS, LVPECL
Operating Temp Range(Celsius)	-40 to 85
Output Frequency(Min)(Mhz)	10
Output Frequency(Max)(Mhz)	800
Output Level	LVPECL
VCC(V)	3.3
No. of Outputs	5
	Samples
	Inventory

Customers Who Evaluated This Product Also Evaluated

CDCM7005: High Performance, Low Phase Noise, Low Skew Clock Synchronizer that Synchronizes Ref Clock to VCXO
CDCM7005-SP: 3.3-V High Performance Rad-Tolerant Class V, Clock Synchronizer And Jitter Cleaner
CDCE913: Programmable 1-PLL VCXO Clock Synthesizer with 2.5-V or 3.3-V LVCMOS Outputs
CDCE62002: Four Output Clock Generator/Jitter Cleaner with Integrated Dual VCOs
CDCE421A: Fully Integrated Wide Range Low-Jitter Crystal Oscillator Clock Generator

Product Information

Features

High Performance 1:5 PLL Clock Synchronizer
Two Clock Inputs: VCXO_IN Clock Is Synchronized to REF_IN Clock
Synchronizes Frequencies up to 800 MHz (VCXO_IN)
Supports Five Differential LVPECL Outputs
Each Output Frequency Is Selectable by x1, /2, /4, /8, /16
All Outputs Are Synchronized
Integrated Low-Noise OPA for External Low-Pass Filter
Efficient Jitter Screening From Low PLL Loop Bandwidth
Low-Phase Noise Characteristic
Programmable Delay for Phase Adjustments
Predivider Loop BW Adjustment
SPI Controllable Division Setting
Power-Up Control Forces LVPECL Outputs to 3-State at VCC <1.5 V
3.3-V Power Supply
Packaged In 64-Pin BGA (0,8 mm Pitch - ZVA) or 48-Pin QFN (RGZ)
Industrial Temperature Range –40°C to 85°C

Description

The CDC7005 is a high-performance, low-phase noise, and low-skew clock synchronizer and jitter cleaner that synchronizes the voltage controlled crystal oscillator (VCXO) frequency to the reference clock. The programmable predividers M and N give a high flexibility to the frequency ratio of the reference clock to VCXO: VCXO_IN/REF_IN = (NxP)/M. The VCXO_IN clock operates up to 800 MHz. Through the selection of external VCXO and loop filter components, the PLL loop bandwidth and damping factor can be adjusted to meet different system requirements. Each of the five differential LVPECL outputs is programmable by the serial peripheral interface (SPI). The SPI allows individual control of frequency and enable/disable state of each output.

View All Description in Datasheet

Pricing / Packaging / CAD Design Tools / Samples

			Price	Packaging			CAD Design Tools		Samples
Device	Status	Temp (^oC)	Price \| Quantity	Package \| Pins	Top Side Marking	Package QTY \| Package Carrier	Symbols	Footprints	Samples
CDC7005GVAT	ACTIVE	-40 to 85	10.00 \| 1ku	BGA (GVA) \| 64		250 \| SMALL T&R
CDC7005RGZ	PREVIEW	-40 to 85		QFN (RGZ) \| 48	View				Not Available
CDC7005RGZR	ACTIVE	-40 to 85	10.00 \| 1ku	QFN (RGZ) \| 48	View	2500 \| LARGE T&R		Purchase Samples
CDC7005RGZRG4	ACTIVE	-40 to 85	10.00 \| 1ku	QFN (RGZ) \| 48	View	2500 \| LARGE T&R		Purchase Samples
CDC7005RGZT	ACTIVE	-40 to 85	11.00 \| 1ku	QFN (RGZ) \| 48	View	250 \| SMALL T&R
CDC7005RGZTG4	ACTIVE	-40 to 85	11.00 \| 1ku	QFN (RGZ) \| 48	View	250 \| SMALL T&R
CDC7005ZVA	ACTIVE	-40 to 85	11.00 \| 1ku	BGA (ZVA) \| 64	View	348 \| JEDEC TRAY (10+1)	Purchase Samples
CDC7005ZVAR	ACTIVE	-40 to 85	10.00 \| 1ku	BGA (ZVA) \| 64	View	1000 \| LARGE T&R	Purchase Samples
CDC7005ZVAT	ACTIVE	-40 to 85	11.00 \| 1ku	BGA (ZVA) \| 64	View	250 \| SMALL T&R

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 12:03 PM GMT, 20 Nov 2009
Region	Company	In Stock	Purchase
TI Lead Time*: 20 WeeksCDC7005GVAT
Americas	Rochester Electronics	>1k
Worldwide	DigiKey	501
TI Lead Time*: 20 WeeksCDC7005RGZR
None Reported View Distributors
TI Lead Time*: 20 WeeksCDC7005RGZRG4
None Reported View Distributors
TI Lead Time*: 16 WeeksCDC7005RGZT
Americas	Newark	124
	Rochester Electronics	250
Asia	Farnell Asia	124
	WPI	157
TI Lead Time*: 16 WeeksCDC7005RGZTG4
None Reported View Distributors
TI Lead Time*: 20 WeeksCDC7005ZVA
Americas	Avnet	143
Europe	Abacus Polar	146
TI Lead Time*: 20 WeeksCDC7005ZVAR
None Reported View Distributors
TI Lead Time*: 20 WeeksCDC7005ZVAT
Asia	WPI	177
View all Distributors

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

	Product Content				DPPM / MTBF / FIT Rate
Device	Eco Plan*	Lead / Ball Finish	MSL Rating / Peak Reflow	Details	Details
CDC7005GVAT	TBD	SNPB	Level-3-235C-168 HR	View	View
CDC7005RGZR	Green (RoHS & no Sb/Br)	Call TI	Level-3-260C-168 HR	View	View
CDC7005RGZRG4	Green (RoHS & no Sb/Br)	Call TI	Level-3-260C-168 HR	View	View
CDC7005RGZT	Green (RoHS & no Sb/Br)	Call TI	Level-3-260C-168 HR	View	View
CDC7005RGZTG4	Green (RoHS & no Sb/Br)	Call TI	Level-3-260C-168 HR	View	View
CDC7005ZVA	Pb-Free (RoHS)	SNAGCU	Level-3-260C-168 HR	View	View
CDC7005ZVAR	Pb-Free (RoHS)	SNAGCU	Level-3-260C-168 HR	View	View
CDC7005ZVAT	Pb-Free (RoHS)	SNAGCU	Level-3-260C-168 HR	View	View

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Most useful technical documents for CDC7005

Datasheet

3.3-V High Performance Clock Synthesizer & Jitter Cleaner (Rev. L) (PDF, 892 KB)
04 Jun 2009

Application Notes

General Guidelines: CDC7005 as a Clock Synthesizer and Jitter Cleaner (HTM, 8 KB) 1291 views
21 Mar 2003 Read Abstract
Basics of the CDC7005 Hold Function (HTM, 8 KB) 654 views
13 Apr 2006 Read Abstract
Open Loop Phase-Noise Performance of CDC7005 at Various Frequencies (HTM, 9 KB) 432 views
17 Dec 2004 Read Abstract
Implementing a CDC7005 Low Jitter Clock Solution for HIgh Speed High IF ADC Dev (HTM, 9 KB) 1138 views
25 Jun 2004 Read Abstract
General Guidelines: CDC7005 as a Clock Synthesizer and Jitter Cleaner (Rev. A) (HTM, 8 KB) 1291 views
16 Dec 2003 Read Abstract
Phase Noise (Jitter) Performance of CDC7005 With Different VCXOs (Rev. A) (HTM, 8 KB) 1131 views
19 Jul 2005 Read Abstract
Using The CDC7005 as a 1:5 PECL Buffer w/Programmable Divider Ratio (Rev. A) (HTM, 8 KB) 590 views
29 May 2009 Read Abstract

User Guides

CDC7005 (BGA Package) EVM (Rev. D) (PDF, 792 KB) 1861 views
29 Dec 2005
CDC7005 (QFN Package) Evaluation Module Manual (Rev. A) (PDF, 797 KB) 1085 views
29 Dec 2005
CDC7005EVM User Guide (Rev. C) (PDF, 893 KB) 1861 views
17 Feb 2005
TSW2000 Receive Clock JItter Cleaning EVM (PDF, 291 KB) 559 views
28 Jun 2004
CDC7005 (QFN Package) Evaluation Module Manual (PDF, 804 KB) 1085 views
20 Jul 2005

More Literature

TSW2000: TLK1201A & CDC7005 (PDF, 188 KB) 799 views
23 Jun 2004
ADS5500 + CDC7005 Product Bulletin (PDF, 167 KB) 600 views
23 Jun 2004
TSW1000 EVM Bill of Materials (ZIP, 166 KB) 344 views
19 Jul 2004

Reference Designs

Description	Part #	Company
TSW4100 Wideband Digital Repeater Demonstration Kit	TSW4100EVM	Texas Instruments

Tools & Software

Name	Part #	Company	Tool / Software Type
CDC7005 and CDCM7005 PLL Loop Bandwidth Calculator	CDC-CDCM7005-CALC	Texas Instruments	Calculation Utilities
CDC7005 Evaluation Module	CDC7005-EVM	Texas Instruments	Development Boards/EVMs
CDC7005 QFN Package Evaluation Module	CDC7005QFN-EVM	Texas Instruments	Development Boards/EVMs
CDCM7005 BGA Package Evaluation Module	CDCM7005BGA-EVM	Texas Instruments	Development Boards/EVMs
CDCM7005 QFN Package Evaluation Module	CDCM7005QFN-EVM	Texas Instruments	Development Boards/EVMs
CDC7005 SPI Software with Labview 8.0 Runtime Engine (Rev. A)(ZIP 55329 KB ) 678 views 16 Dec 2005
CDC7005 EVM QFN Gerber Files(ZIP 537 KB ) 224 views 15 Jul 2005
TSW1000 EVM Gerber Files(ZIP 532 KB ) 217 views 19 Jul 2004

Simulation Models

IBIS Model
- CDC7005 IBIS Model (Multiple File Format) 303 views
  18 Feb 2004 Read Abstract

Part #	Name	Product Family	Comments
ADS5500	14-bit, 125 MSPS ADC Single Ch. Low Power and Superior AC Performance	DATA CONVERTERS - ANALOG TO DIGITAL CONVERTER	Implementing a CDC7005 Low Jitter Clock Solution For High-Speed, High-IF ADC Devices See Literature slwa034 Application Note
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CDCM7005-SP	3.3-V High Performance Rad-Tolerant Class V, Clock Synchronizer And Jitter Cleaner	ULTRA LOW JITTER SYNTHESIZER AND JITTER CLEANER-EXTERNAL VCXO OUTPUT	TI customers also evaluated this product.
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CDC7005 Status: ACTIVE

High Performance, Low Phase Noise, Low Skew Clock Synchronizer that Synchronizes Ref Clock to VCXO

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