CDCM61002 Status: ACTIVE

1:2 Ultra Low Jitter Crystal-In Clock Generator

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Datasheet

Two Output, Integrated VCO, Low-Jitter Clock Generator (Rev. B) (PDF 860 KB)
24 Jul 2009

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	CDCE62005	CDCM61001	CDCM61002	CDCM61004
VCC(V)	3.3	3.3	3.3	3.3
Input Level	LVPECL,LVDS,LVCMOS	Crystal or LVCMOS	Crystal or LVCMOS	Crystal or LVCMOS
Output Level	LVPECL,LVDS,LVCMOS	LVPECL or LVDS or 2 LVCMOS	LVPECL or LVDS or 2 LVCMOS	LVPECL or LVDS or 2 LVCMOS
No. of Outputs	5	1	2	4
Output Frequency(Min)(Mhz)	4.25	43.75	43.75	43.75
Output Frequency(Max)(Mhz)	1175	683.28	683.28	683.28
Divider Ratio	Universal	Universal	Universal	Universal
RMS Jitter	1ps	500fs Typical, <1ps Max	500fs Typical, <1ps Max	500fs Typical, <1ps Max
Operating Frequency Range(Min)(MHz)	4.25	43.75	43.75	43.75
Operating Frequency Range(Max)(MHz)	1175	683.28	683.28	683.28
Output Skew(ps)	75
Voltage Range	3.3	3.3	3.3	3.3
Supply Current(mA)		108mA Max	108mA Max	108mA Max
	Samples	Samples	Samples	Samples
	Inventory	Inventory	Inventory	Inventory

Customers Who Evaluated This Product Also Evaluated

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CDCM61001: 1:1 Ultra Low Jitter Crystal-In Clock Generator
CDCE913: Programmable 1-PLL VCXO Clock Synthesizer with 2.5-V or 3.3-V LVCMOS Outputs
CDCE925: Programmable 2-PLL VCXO Clock Synthesizer with 2.5-V or 3.3-V LVCMOS Outputs
CDCE949: Programmable 4-PLL VCXO Clock Synthesizer with 2.5V or 3.3V LVCMOS Outputs

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Product Information

Features

One Single-Ended/Crystal Reference Input Including
24.8832 MHz, 25 MHz, and 26.5625 MHz
Input Frequency Range: 21.875 MHz to 28.47 MHz
On-Chip VCO Operates in Frequency Range of
1.75 GHz to 2.05 GHz
2x Output Available:
- Pin-Selectable Between LVPECL, LVDS,
  or 2-LVCMOS; Operates at 3.3 V
LVCMOS Bypass Output Available
Output Frequency Selectable by /1, /2, /3, /4, /6, /8
from a Single Output Divider
Supports Common LVPECL/LVDS Output Frequencies:
- 62.5 MHz, 74.25 MHz, 75 MHz, 77.76 MHz, 100 MHz,
  106.25 MHz, 125 MHz, 150 MHz, 155.52 MHz, 156.25 MHz,
  159.375 MHz, 187.5 MHz, 200 MHz, 212.5 MHz, 250 MHz,
  311.04 MHz, 312.5 MHz, 622.08 MHz, 625 MHz
Supports Common LVCMOS Output Frequencies:
- 62.5 MHz, 74.25 MHz, 75 MHz, 77.76 MHz, 100 MHz,
  106.25 MHz, 125 MHz, 150 MHz, 155.52 MHz, 156.25 MHz,
  159.375 MHz, 187.5 MHz, 200 MHz, 212.5 MHz, 250 MHz
Output Frequency Range: 43.75 MHz to
683.264 MHz
Internal PLL Loop Bandwidth: 400 kHz
High-Performance PLL Core:
- Phase Noise typically at –146 dBc/Hz at
  5-MHz Offset for 625-MHz LVPECL Output
- Random Jitter typically at 0.509 ps, RMS
  (10 kHz to 20 MHz) for 625-MHz LVPECL Output
Output Duty Cycle Corrected to 50% (± 5%)
Low Output Skew of 20 ps on LVPECL Outputs
Divider Programming Using Control Pins:
- Two Pins for Prescaler/Feedback Divider
- Three Pins for Output Divider
- Two Pins for Output Select
Chip Enable Control Pin Available
3.3-V Core and I/O Power Supply
Industrial Temperature Range: –40°C to +85°C
5-mm × 5-mm, 32-pin, QFN (RHB) Package
ESD Protection Exceeds 2 kV (HBM)
APPLICATIONS
- Low Jitter Clock Driver for High-End Datacom
  Applications Including SONET, Ethernet, Fibre Channel,
  Serial ATA, and HDTV
- Cost-Effective High-Frequency Crystal Oscillator
  Replacement

All other trademarks are the property of their respective owners.

Description

The CDCM61002 is a highly versatile, low-jitter frequency synthesizer that can generate two low-jitter clock outputs, selectable between low-voltage positive emitter coupled logic (LVPECL), low-voltage differential signaling (LVDS), or low-voltage complementary metal oxide semiconductor (LVCMOS) outputs, from a low-frequency crystal or LVCMOS input for a variety of wireline and data communication applications. The CDCM61002 features an onboard PLL that can be easily configured solely through control pins. The overall output random jitter performance is less than 1ps, RMS (from 10 kHz to 20 MHz), making this device a perfect choice for use in demanding applications such as SONET, Ethernet, Fibre Channel, and SAN. The CDCM61002 is available in a small, 32-pin, 5-mm × 5-mm QFN package.

The CDCM61002 is a high-performance, low phase noise, fully-integrated voltage-controlled oscillator (VCO) clock synthesizer with two universal output buffers that can be configured to be LVPECL, LVDS, or LVCMOS compatible. Each universal output can also be converted to two LVCMOS outputs. Additionally, an LVCMOS bypass output clock is available in an output configuration which can help with crystal loading in order to achieve an exact desired input frequency. It has one fully-integrated, low-noise, LC-based VCO that operates in the 1.75 GHz to 2.05 GHz range.

The phase-locked loop (PLL) synchronizes the VCO with respect to the input, which can either be a low-frequency crystal or a low-noise LVCMOS input. The outputs share an output divider sourced from the VCO core. All device settings are managed through a control pin structure, which has two pins that control the prescaler and feedback divider, three pins that control the output divider, two pins that control the output type, and one pin that controls the output enable. Any time the PLL settings (including the input frequency, prescaler divider, or feedback divider) are altered, a reset must be issued through the Reset control pin (active low for device reset). The reset initiates a PLL recalibration process to ensure PLL lock. When the device is in reset, the outputs and dividered are turned off.

The output frequency (f_OUT) is proportional to the frequency of the input clock (f_IN). The feedback divider, output divider, and VCO frequency set f_OUT with respect to f_IN. For a configuration setting for common wireline and datacom applications, refer to Table 2. For other applications, use Equation 1 to calculate the exact crystal oscillator frequency required for the desired output.

f_IN = (Output Divider Feedback Divider) × f_OUT

The output divider can be chosen from 1, 2, 3, 4, 6, or 8 through the use of control pins. Feedback divider and prescaler divider combinations can be chosen from 25 and 3, 24 and 3, 20 and 4, or 15 and 5, respectively, also through the use of control pins. shows a high-level block diagram of the CDCM61002.

The device operates in a 3.3-V supply environment and is characterized for operation from
–40°C to +85°C.

Pricing / Packaging / CAD Design Tools / Samples

		Price	Packaging			Samples
Device	Status	Price \| Quantity	Package \| Pins	Top Side Marking	Package QTY \| Package Carrier	Samples
CDCM61002RHBR	ACTIVE	5.00 \| 1ku	QFN (RHB) \| 32	View	3000 \| LARGE T&R	Purchase Samples
CDCM61002RHBT	ACTIVE	5.50 \| 1ku	QFN (RHB) \| 32	View	250 \| SMALL T&R

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 11:55 AM GMT, 08 Nov 2009
Region	Company	In Stock	Purchase
TI Lead Time*: 20 WeeksCDCM61002RHBR
None Reported View Distributors
TI Lead Time*: 8 WeeksCDCM61002RHBT
Americas	Arrow	250
	Avnet	250
	Newark	231
Asia	Farnell Asia	250
Asia	WPI	175
Europe	Arrow Northern Europe	250
	Avnet-SILICA	250
	Farnell	250
Worldwide	Mouser Electronics	208
View all Distributors

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

	Product Content				DPPM / MTBF / FIT Rate
Device	Eco Plan*	Lead / Ball Finish	MSL Rating / Peak Reflow	Details	Details
CDCM61002RHBR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-2-260C-1 YEAR	View	View
CDCM61002RHBT	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-2-260C-1 YEAR	View	View

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Most useful technical documents for CDCM61002

Tools & Software

Name	Part #	Company	Tool / Software Type
CDCM61004/CDCM61002/CDCM61001 Evaluation Module	CDCM6100XEVM	Texas Instruments	Development Boards/EVMs

Simulation Models

IBIS Model
- CDCM61002 IBIS Model Version 1.0 (ZIP, 95 KB) 11 views
  26 Jun 2009

Part #	Name	Product Family	Comments
CDCM61001	1:1 Ultra Low Jitter Crystal-In Clock Generator	ULTRA LOW JITTER SYNTHESIZER AND JITTER CLEANER - INTERNAL VCO OUTPUT	The device has the SAME FUNCTIONALITY and PINOUT as the compared device but is NOT an exact equivalent. The same pin-pin compatible family with different number of outputs
CDCM61004	1:4 Ultra Low Jitter Crystal-In Clock Generator	ULTRA LOW JITTER SYNTHESIZER AND JITTER CLEANER - INTERNAL VCO OUTPUT	The device has the SAME FUNCTIONALITY and PINOUT as the compared device but is NOT an exact equivalent. The same pin-pin compatible family with different number of outputs
CDCE62005	5/10 Outputs Clock Generator/Jitter Cleaner with Integrated Dual VCO	ULTRA LOW JITTER SYNTHESIZER AND JITTER CLEANER - INTERNAL VCO OUTPUT	The device has SIMILAR FUNCTIONALITY but is not functionally equivalent to the compared device. CDCSM6100x performs a subset function of CDCE62005 with more easy to use feature
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CDCM61002 Status: ACTIVE

1:2 Ultra Low Jitter Crystal-In Clock Generator

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