Specialty Logic - IEEE-1284 Parallel Port Interface (PPI) - SN74LVCE161284

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Datasheet

SN74LVCE161284 (PDF 367 KB)
19 Jan 2004

	SN74LVCE161284
Vcc range(V)	3 to 3.6
Technology Family	LVC
	Samples
	Inventory

Customers Who Evaluated This Product Also Evaluated

SN74LVC245A: Octal Bus Transceiver With 3-State Outputs

Product Information

Features

Auto-Power-Up Feature Prevents Printer Errors When Printer Is Turned On, But No Valid Signal Is at A9–A13 Pins
1.4-k Pullup Resistors Integrated on All Open-Drain Outputs Eliminate the Need for Discrete Resistors
Designed for the IEEE Std 1284-I (Level-1 Type) and IEEE Std 1284-II (Level-2 Type) Electrical Specifications
Flow-Through Architecture Optimizes PCB Layout
Ioff and Power-Up 3-State Support Hot Insertion
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection
- ±4 kV - Human-Body Model
- ±8 kV - IEC 61000-4-2, Contact Discharge (Connector Pins)
- ±15 kV - IEC 61000-4-2, Air-Gap Discharge (Connector Pins)
- ±15 kV - Human-Body Model (Connector Pins)

Description

The SN74LVCE161284 is designed for 3-V to 3.6-V V_CC operation. This device provides asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

This device has eight bidirectional bits; data can flow in the A-to-B direction when the direction-control input (DIR) is high and in the B-to-A direction when DIR is low. This device also has five drivers that drive the cable side, and four receivers. The SN74LVCE161284 has one receiver dedicated to the HOST LOGIC line and a driver to drive the PERI LOGIC line.

The output drive mode is determined by the high-drive (HD) control pin. When HD is high, the outputs are in a totem-pole configuration, and in an open-drain configuration when HD is low.

View All Description in Datasheet

Pricing / Packaging / CAD Design Tools / Samples

			Price	Packaging			CAD Design Tools	Samples
Device	Status	Temp (^oC)	Price \| Quantity	Package \| Pins	Top Side Marking	Package QTY \| Package Carrier	Footprints	Samples
74LVCE161284DGGRE4	ACTIVE	0 to 70	2.00 \| 1ku	TSSOP (DGG) \| 48	View	2000 \| LARGE T&R
74LVCE161284DGGRG4	ACTIVE	0 to 70	2.00 \| 1ku	TSSOP (DGG) \| 48	View	2000 \| LARGE T&R
74LVCE161284DLG4	ACTIVE	0 to 70	2.65 \| 1ku	SSOP (DL) \| 48	View	25 \| TUBE	Purchase Samples
74LVCE161284DLRG4	ACTIVE	0 to 70	2.00 \| 1ku	SSOP (DL) \| 48	View	1000 \| LARGE T&R
74LVCE161284VRE4	ACTIVE	0 to 70	2.00 \| 1ku	TVSOP (DGV) \| 48	View	2000 \| LARGE T&R
74LVCE161284VRG4	ACTIVE	0 to 70	2.00 \| 1ku	TVSOP (DGV) \| 48	View	2000 \| LARGE T&R
SN74LVCE161284DGGR	ACTIVE	0 to 70	2.00 \| 1ku	TSSOP (DGG) \| 48	View	2000 \| LARGE T&R
SN74LVCE161284DL	ACTIVE	0 to 70	2.65 \| 1ku	SSOP (DL) \| 48	View	25 \| TUBE	Purchase Samples
SN74LVCE161284DLR	ACTIVE	0 to 70	2.00 \| 1ku	SSOP (DL) \| 48	View	1000 \| LARGE T&R
SN74LVCE161284VR	ACTIVE	0 to 70	2.00 \| 1ku	TVSOP (DGV) \| 48	View	2000 \| LARGE T&R

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 10:26 AM GMT, 09 Feb 2010
Region	Company	In Stock	Purchase
TI Lead Time*: 22 Weeks74LVCE161284DGGRE4
None Reported View Distributors
TI Lead Time*: 22 Weeks74LVCE161284DGGRG4
None Reported View Distributors
TI Lead Time*: 20 Weeks74LVCE161284DLG4
None Reported View Distributors
TI Lead Time*: 20 Weeks74LVCE161284DLRG4
None Reported View Distributors
TI Lead Time*: 20 Weeks74LVCE161284VRE4
None Reported View Distributors
TI Lead Time*: 20 Weeks74LVCE161284VRG4
None Reported View Distributors
TI Lead Time*: 22 WeeksSN74LVCE161284DGGR
Asia	Farnell Asia	75
Europe	Farnell	75
TI Lead Time*: 20 WeeksSN74LVCE161284DL
Americas	Rochester Electronics	>1k
TI Lead Time*: 20 WeeksSN74LVCE161284DLR
Americas	Rochester Electronics	>1k
TI Lead Time*: 20 WeeksSN74LVCE161284VR
Americas	Rochester Electronics	>1k
View all Distributors

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

	Product Content				DPPM / MTBF / FIT Rate
Device	Eco Plan*	Lead / Ball Finish	MSL Rating / Peak Reflow	Details	Details
74LVCE161284DGGRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
74LVCE161284DGGRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
74LVCE161284DLG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
74LVCE161284DLRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
74LVCE161284VRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
74LVCE161284VRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74LVCE161284DGGR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74LVCE161284DL	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74LVCE161284DLR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74LVCE161284VR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Most useful technical documents for SN74LVCE161284

Datasheet

SN74LVCE161284 (PDF, 367 KB)
19 Jan 2004

Application Notes

Input and Output Characteristics of Digital Integrated Circuits (HTM, 9 KB) 10335 views
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28 May 2003 Read Abstract
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16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) (HTM, 8 KB) 1186 views
22 May 2002 Read Abstract
Implications of Slow or Floating CMOS Inputs (Rev. C) (HTM, 8 KB) 7469 views
01 Feb 1998 Read Abstract
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices (HTM, 9 KB) 678 views
01 Dec 1997 Read Abstract
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) (HTM, 8 KB) 2553 views
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CMOS Power Consumption and CPD Calculation (Rev. B) (HTM, 9 KB) 3339 views
01 Jun 1997 Read Abstract
LVC Characterization Information (HTM, 8 KB) 2521 views
01 Dec 1996 Read Abstract
Understanding Advanced Bus-Interface Products Design Guide (PDF, 253 KB) 4404 views
01 May 1996

View Application Notes for IEEE-1284 Parallel Port Interface (PPI)

User Guides

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Selection Guides

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23 Jul 2009

Solution Guides

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More Literature

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13 Jul 2004
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SN74LVC1G3157 and SNS74LVC2G53 SPDT Analog Switches (PDF, 65 KB) 2897 views
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LVCE161284 Application Clip (PDF, 219 KB) 1574 views
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Standard Linear & Logic for PCs, Servers & Motherboards (PDF, 3997 KB) 1276 views
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Simulation Models

HSpice Model
- HSPICE MODEL OF SN74LVCE161284 (ZIP, 234 KB) 215 views
  07 Oct 2005

Customers Who Evaluated This Product Also Evaluated...
Part #	Name	Product Family	Comments
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SN74LVCE161284 Status: ACTIVE

19-Bit IEEE 1284 Translation Transceiver with Error-Free Power Up

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Quality & Lead (Pb)-Free Data

Technical Documents

Datasheet

Application Notes

User Guides

Selection Guides

Solution Guides

More Literature

Simulation Models

Support and Community

Customer Tags

Other Support

SN74LVCE161284 Status: ACTIVE

19-Bit IEEE 1284 Translation Transceiver with Error-Free Power Up

Most Popular Links

Datasheet

Customers Who Evaluated This Product Also Evaluated

Product Information

Features

Description

Pricing / Packaging / CAD Design Tools / Samples

Inventory

Quality & Lead (Pb)-Free Data

Technical Documents

Datasheet

Application Notes

User Guides

Selection Guides

Solution Guides

More Literature

Simulation Models

Related Products

Support and Community

Customer Tags

Other Support