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SN74LVT8996-EP Status: ACTIVE

Enhanced Product 3.3-V Abt 10-Bit Multidrop-Addressable Ieee Std 1149.1 Tap Transceiver


      
         
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Datasheet

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 SN74LVT8996-EP
Voltage Nodes(V)3.3, 2.7  
Vcc range(V)2.7 to 3.6  
Input LevelTTL/CMOS  
Output LevelLVTTL  
RatingHiRel Enhanced Product  
Technology FamilyJTAG  
 Samples
 Inventory

Other qualified versions of SN74LVT8996-EP

Version Part Number Definition
Catalog SN74LVT8996 TI's standard catalog product

Customers Who Evaluated This Product Also Evaluated

  • SN54LVT8980A: Embedded Test-Bus Controllers IEEE STD 1149.1 (Jtag) Tap Masters W/ 8-Bit Gener

Product Information

Features

  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • Member of the Texas Instruments (TI) Broad Family of Testability Products Supporting IEEE Std 1149.1-1990 (JTAG) Test Access Port (TAP) and Boundary-Scan Architecture
  • Extends Scan Access From Board Level to Higher Levels of System Integration
  • Promotes Reuse of Lower-Level Chip/Board) Tests in System Environment
  • While Powered at 3.3 V, Both the Primary and Secondary TAPs Are Fully 5-V Tolerant for Interfacing to 5-V and/or 3.3-V Masters and Targets
  • Switch-Based Architecture Allows Direct Connect of Primary TAP to Secondary TAP
  • Primary TAP Is Multidrop for Minimal Use of Backplane Wiring Channels
  • Shadow Protocols Can Occur in Any of Test-Logic-Reset, Run-Test/Idle, Pause-DR, and Pause-IR TAP States to Provide for Board-to-Board Test and Built-In Self-Test
  • Simple Addressing (Shadow) Protocol Is Received/Acknowledged on Primary TAP
  • 10-Bit Address Space Provides for up to 1021 User-Specified Board Addresses
  • Bypass (BYP)\ Pin Forces Primary-to-Secondary Connection Without Use of Shadow Protocols
  • Connect (CON)\ Pin Provides Indication of Primary-to-Secondary Connection
  • High-Drive Outputs (–32-mA IOH, 64-mA IOL) Support Backplane Interface at Primary and High Fanout at Secondary
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)

View All Features in Datasheet

Description

The SN74LVT8996 10-bit addressable scan port (ASP) is a member of the Texas Instruments SCOPE™ testability integrated-circuit family. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of complex circuit assemblies. Unlike most SCOPE™ devices, the ASP is not a boundary-scannable device, rather, it applies TI’s addressable-shadow-port technology to the IEEE Std 1149.1-1990 (JTAG) test access port (TAP) to extend scan access beyond the board level.

This device is functionally equivalent to the ’ABT8996 ASPs. Additionally, it is designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to interface to 5-V masters and/or targets.

Conceptually, the ASP is a simple switch that can be used to directly connect a set of multidrop primary TAP signals to a set of secondary TAP signals - for example, to interface backplane TAP signals to a board-level TAP.

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Pricing / Packaging / CAD Design Tools / Samples

PricePackagingCAD Design ToolsSamples
DeviceStatusTemp (oC)DSCC #Price | QuantityPackage | PinsTop Side MarkingPackage QTY | Package CarrierFootprintsSamples
SN74LVT8996IPWREPACTIVE-40 to 85V62/04644-01YE9.18 | 1kuTSSOP (PW) | 24 View 2000 | LARGE T&R Download CAD Format for this FootprintPurchase Samples
V62/04644-01YEACTIVE-40 to 85 9.18 | 1kuTSSOP (PW) | 24 View 2000 | LARGE T&R Download CAD Format for this FootprintPurchase Samples

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 10:52 AM GMT, 22 Nov 2009
RegionCompanyIn StockPurchase
TI Lead Time*: 20 WeeksSN74LVT8996IPWREP
None Reported
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TI Lead Time*: 20 WeeksV62/04644-01YE
None Reported
View Distributors
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** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

 Product ContentDPPM / MTBF / FIT Rate
DeviceEco Plan* Lead / Ball FinishMSL Rating / Peak ReflowDetailsDetails
SN74LVT8996IPWREP RoHS Compliant Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIMViewView
V62/04644-01YE RoHS Compliant Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIMViewView

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Most useful technical documents for SN74LVT8996-EP Help

Datasheet

Application Notes

View Application Notes for Boundary Scan (JTAG) Support Devices

User Guides

More Literature

Tools & Software

NamePart # Company Tool / Software Type
Boundary-Scan Logic ModelsBSDLTexas InstrumentsSimulators
Scan EducatorSCAN_EDUCATORTexas InstrumentsSimulators

Customers Who Evaluated This Product Also Evaluated...
Part # Name Product Family Comments
SN54LVT8980A Embedded Test-Bus Controllers IEEE STD 1149.1 (Jtag) Tap Masters W/ 8-Bit Gener BOUNDARY SCAN (JTAG) LOGIC-BOUNDARY SCAN (JTAG) SUPPORT DEVICES TI customers also evaluated this product.

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