TMS320F28P559SJ-Q1

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오토모티브 C2000™ 32비트 MCU, 1x C28x + 1x CLA, 150MHz, 1.1MB 플래시, 5x ADC, CLB, AES 및 NNPU

제품 상세 정보

CPU C28x, CLA Frequency (MHz) 150 Flash memory (kByte) 1024 RAM (kByte) 133 ADC resolution (Bps) 12 Total processing (MIPS) 300 Features Configurable logic block, FPU32, InstaSPIN-FOC technology, TINIE accelerator UART 4 CAN (#) 2 PWM (Ch) 24 Number of ADC channels 28, 35, 39 Direct memory access (Ch) 6 SPI 2 QEP 3 USB USB 2.0 Operating temperature range (°C) -40 to 150 Rating Automotive Communication interface CAN, FSI, I2C, LIN, PMBUS, SPI, UART
CPU C28x, CLA Frequency (MHz) 150 Flash memory (kByte) 1024 RAM (kByte) 133 ADC resolution (Bps) 12 Total processing (MIPS) 300 Features Configurable logic block, FPU32, InstaSPIN-FOC technology, TINIE accelerator UART 4 CAN (#) 2 PWM (Ch) 24 Number of ADC channels 28, 35, 39 Direct memory access (Ch) 6 SPI 2 QEP 3 USB USB 2.0 Operating temperature range (°C) -40 to 150 Rating Automotive Communication interface CAN, FSI, I2C, LIN, PMBUS, SPI, UART
LQFP (PZ) 100 256 mm² 16 x 16 TQFP (PDT) 128 256 mm² 16 x 16 UNKNOWN (PTF) 128 See data sheet
  • Real-time processing:
    • 150MHz C28x 32-bit DSP CPU
    • Equivalent to 300MHz Arm® Cortex®-M7 based device on real-time signal chain performance (see the Real-time Benchmarks Showcasing C2000™ Control MCU’s Optimized Signal Chain Application Note
    • IEEE 754 single-precision Floating-Point Unit (FPU32)
    • Trigonometric Math Unit (TMU)
      • Support for Nonlinear Proportional Integral Derivative (NLPID) control
    • Neural-Network Processing Unit (NNPU)
    • CRC Engine and Instructions (VCRC)
  • Programmable Control Law Accelerator (CLA)
  • On-chip memory
    • 1088KB of flash (ECC-protected) across five independent banks
      • Four 256KB banks
      • One 64KB bank, ideal of LFU/Bootloaders/data
    • 8KB of OTP (One Time Programmable flash memory)
    • 133KB of RAM (ECC/Parity protected)
  • Security
    • Secure Boot
    • JTAG Lock
    • Advanced Encryption Standard (AES) accelerator
    • Unique Identification (UID) number
  • Clock and system control
    • Two internal 10MHz oscillators
    • Crystal oscillator or external clock input
    • Windowed watchdog timer module
    • Missing clock detection circuitry
    • Dual-clock Comparator (DCC)
  • 3.3V I/O design
    • Internal VREG generation allows for single-supply design
    • Brownout reset (BOR) circuit
    • 5V failsafe and tolerant capability on 4 GPIOs for PMBUS/I2C support
    • Configurable 1.35V VIH on 4 GPIOs
  • System peripherals
    • 6-channel Direct Memory Access (DMA) controller
    • 91 individually programmable multiplexed General-Purpose Input/Output (GPIO) pins (22 shared with Analog)
    • 17 digital inputs on analog pins
    • Enhanced Peripheral Interrupt Expansion (ePIE)
    • Multiple low-power mode (LPM) support
  • Communications peripherals
    • One Power-Management Bus (PMBus) interface
      • Fast Plus Mode Support - 1MHz SCL
      • 5V/3.3V/1.35V VIH support on select pins
    • Two Inter-integrated Circuit (I2C) interfaces
    • Two Controller Area Network with Flexible Data-Rate (CAN FD/MCAN) bus port
      • 4KB message RAM per MCAN module, independent of system memory
      • Ability to re-use RAM for CPU data variables if MCAN is not used
    • One Universal Serial Bus (USB 2.0 MAC + PHY)
    • Two Serial Peripheral Interface (SPI) ports
    • Three UART-compatible Serial Communication Interface (SCI)
    • One UART-compatible Local Interconnect Network (LIN) interface
  • Analog system
    • Five 3.9MSPS, 12-bit Analog-to-Digital Converters (ADCs)
      • Up to 39 external channels (includes one gpdac output)
      • Four integrated Post-Processing Blocks (PPB) per ADC
    • Four windowed comparators (CMPSS) with 12-bit reference Digital-to-Analog Converters (DACs)
      • Digital glitch filters
      • Low DAC output to pin capability on CMPSS1
    • One 12-bit buffered DAC output
    • Three Programmable Gain Amplifiers (PGAs)
      • Unity gain support
      • Inverting and non-inverting gain mode support
      • Programmable output filtering
  • Enhanced control peripherals
    • 24 ePWM channels with 16 channels that have high-resolution capability (150ps resolution)
      • Integrated dead-band support
      • Integrated hardware trip zones (TZs)
    • Two Enhanced Capture (eCAP) modules
    • Three Enhanced Quadrature Encoder Pulse (eQEP) modules with support for CW/CCW operation modes
    • Embedded Pattern Generator (EPG)
  • Configurable Logic Block (CLB)
    • 2 tiles
    • Augments existing peripheral capability
    • Supports position manager solutions
  • Live Firmware Update (LFU)
  • Diagnostic features
    • Memory Power-On Self-Test (MPOST)
  • Functional Safety-Compliant targeted
    • Developed for functional safety applications
    • Documentation available to aid ISO 26262 and IEC 61508 system design
    • Systematic capability up to ASIL D and SIL 3 targeted
    • Hardware integrity up to ASIL B targeted
  • Safety-related certification
    • ISO 26262 certification up to ASIL B by TÜV SÜD planned
  • Package options:
    • 128-pin Thin Quad Flatpack (TQFP)[PDT suffix]
    • 100-pin Low-profile Quad Flatpack (LQFP)[PZ suffix]
    • 80-pin TQFP [PNA suffix]
    • 64-pin LQFP [PM suffix]
    • 56-pin Very Thin Quad Flatpack No-Lead (VQFN) [RSH suffix]
  • Temperature options:
    • Junction (TJ): –40°C to 150°C
  • Real-time processing:
    • 150MHz C28x 32-bit DSP CPU
    • Equivalent to 300MHz Arm® Cortex®-M7 based device on real-time signal chain performance (see the Real-time Benchmarks Showcasing C2000™ Control MCU’s Optimized Signal Chain Application Note
    • IEEE 754 single-precision Floating-Point Unit (FPU32)
    • Trigonometric Math Unit (TMU)
      • Support for Nonlinear Proportional Integral Derivative (NLPID) control
    • Neural-Network Processing Unit (NNPU)
    • CRC Engine and Instructions (VCRC)
  • Programmable Control Law Accelerator (CLA)
  • On-chip memory
    • 1088KB of flash (ECC-protected) across five independent banks
      • Four 256KB banks
      • One 64KB bank, ideal of LFU/Bootloaders/data
    • 8KB of OTP (One Time Programmable flash memory)
    • 133KB of RAM (ECC/Parity protected)
  • Security
    • Secure Boot
    • JTAG Lock
    • Advanced Encryption Standard (AES) accelerator
    • Unique Identification (UID) number
  • Clock and system control
    • Two internal 10MHz oscillators
    • Crystal oscillator or external clock input
    • Windowed watchdog timer module
    • Missing clock detection circuitry
    • Dual-clock Comparator (DCC)
  • 3.3V I/O design
    • Internal VREG generation allows for single-supply design
    • Brownout reset (BOR) circuit
    • 5V failsafe and tolerant capability on 4 GPIOs for PMBUS/I2C support
    • Configurable 1.35V VIH on 4 GPIOs
  • System peripherals
    • 6-channel Direct Memory Access (DMA) controller
    • 91 individually programmable multiplexed General-Purpose Input/Output (GPIO) pins (22 shared with Analog)
    • 17 digital inputs on analog pins
    • Enhanced Peripheral Interrupt Expansion (ePIE)
    • Multiple low-power mode (LPM) support
  • Communications peripherals
    • One Power-Management Bus (PMBus) interface
      • Fast Plus Mode Support - 1MHz SCL
      • 5V/3.3V/1.35V VIH support on select pins
    • Two Inter-integrated Circuit (I2C) interfaces
    • Two Controller Area Network with Flexible Data-Rate (CAN FD/MCAN) bus port
      • 4KB message RAM per MCAN module, independent of system memory
      • Ability to re-use RAM for CPU data variables if MCAN is not used
    • One Universal Serial Bus (USB 2.0 MAC + PHY)
    • Two Serial Peripheral Interface (SPI) ports
    • Three UART-compatible Serial Communication Interface (SCI)
    • One UART-compatible Local Interconnect Network (LIN) interface
  • Analog system
    • Five 3.9MSPS, 12-bit Analog-to-Digital Converters (ADCs)
      • Up to 39 external channels (includes one gpdac output)
      • Four integrated Post-Processing Blocks (PPB) per ADC
    • Four windowed comparators (CMPSS) with 12-bit reference Digital-to-Analog Converters (DACs)
      • Digital glitch filters
      • Low DAC output to pin capability on CMPSS1
    • One 12-bit buffered DAC output
    • Three Programmable Gain Amplifiers (PGAs)
      • Unity gain support
      • Inverting and non-inverting gain mode support
      • Programmable output filtering
  • Enhanced control peripherals
    • 24 ePWM channels with 16 channels that have high-resolution capability (150ps resolution)
      • Integrated dead-band support
      • Integrated hardware trip zones (TZs)
    • Two Enhanced Capture (eCAP) modules
    • Three Enhanced Quadrature Encoder Pulse (eQEP) modules with support for CW/CCW operation modes
    • Embedded Pattern Generator (EPG)
  • Configurable Logic Block (CLB)
    • 2 tiles
    • Augments existing peripheral capability
    • Supports position manager solutions
  • Live Firmware Update (LFU)
  • Diagnostic features
    • Memory Power-On Self-Test (MPOST)
  • Functional Safety-Compliant targeted
    • Developed for functional safety applications
    • Documentation available to aid ISO 26262 and IEC 61508 system design
    • Systematic capability up to ASIL D and SIL 3 targeted
    • Hardware integrity up to ASIL B targeted
  • Safety-related certification
    • ISO 26262 certification up to ASIL B by TÜV SÜD planned
  • Package options:
    • 128-pin Thin Quad Flatpack (TQFP)[PDT suffix]
    • 100-pin Low-profile Quad Flatpack (LQFP)[PZ suffix]
    • 80-pin TQFP [PNA suffix]
    • 64-pin LQFP [PM suffix]
    • 56-pin Very Thin Quad Flatpack No-Lead (VQFN) [RSH suffix]
  • Temperature options:
    • Junction (TJ): –40°C to 150°C

The TMS320F28P55x (F28P55x) is a member of the C2000™ real-time microcontroller family of scalable, ultra-low latency devices designed for efficiency in power electronics, including but not limited to: high power density, high switching frequencies, and supporting the use of GaN and SiC technologies.

These include such applications as:

The real-time control subsystem is based on TI’s 32-bit C28x DSP core, which provides 150MHz of signal-processing performance for floating- or fixed-point code running from either on-chip flash or SRAM. The C28x CPU is further boosted by the Floating-Point Unit (FPU), Trigonometric Math Unit (TMU), and VCRC (Cyclical Redundancy Check) extended instruction sets, speeding up common algorithms key to real-time control systems.

The CLA allows significant offloading of common tasks from the main C28x CPU. The CLA is an independent 32-bit floating-point math accelerator that executes in parallel with the CPU. Additionally, the CLA has its own dedicated memory resources and it can directly access the key peripherals that are required in a typical control system. Support of a subset of ANSI C is standard, as are key features like hardware breakpoints and hardware task-switching.

The F28P55x supports up to 1088KB of flash memory divided into four 256KB banks plus one 64KB bank, which enable programming one bank and execution in another bank in parallel. Up to 133KB of on-chip SRAM is also available to supplement the flash memory.

The Live Firmware Update hardware enhancements on F28P55x allow fast context switching from the old firmware to the new firmware to minimize application downtime when updating the device firmware.

High-performance analog blocks are integrated on the F28P55x real-time microcontroller (MCU) and are closely coupled with the processing and PWM units to provide optimal real-time signal chain performance. Twenty-four PWM channels, all supporting frequency-independent resolution modes, enable control of various power stages from a 3-phase inverter to power factor correction and advanced multilevel power topologies.

The inclusion of the Configurable Logic Block (CLB) allows the user to add custom logic and potentially integrate FPGA-like functions into the C2000 real-time MCU.

Interfacing is supported through various industry-standard communication ports (such as SPI, SCI, I2C, PMBus, LIN, and CAN FD) and offers multiple pin-muxing options for optimal signal placement.

Want to learn more about features that make C2000 Real-Time MCUs the right choice for your real-time control system? Check out The Essential Guide for Developing With C2000™ Real-Time Microcontrollers and visit the C2000™ real-time control MCUs page.

The Getting Started With C2000™ Real-Time Control Microcontrollers (MCUs) Getting Started Guide covers all aspects of development with C2000 devices from hardware to support resources. In addition to key reference documents, each section provides relevant links and resources to further expand on the information covered.

Ready to get started? Check out the TMDSCNCD28P55X evaluation board or the LAUNCHXL-F28P55X development kit, and download C2000Ware.

The TMS320F28P55x (F28P55x) is a member of the C2000™ real-time microcontroller family of scalable, ultra-low latency devices designed for efficiency in power electronics, including but not limited to: high power density, high switching frequencies, and supporting the use of GaN and SiC technologies.

These include such applications as:

The real-time control subsystem is based on TI’s 32-bit C28x DSP core, which provides 150MHz of signal-processing performance for floating- or fixed-point code running from either on-chip flash or SRAM. The C28x CPU is further boosted by the Floating-Point Unit (FPU), Trigonometric Math Unit (TMU), and VCRC (Cyclical Redundancy Check) extended instruction sets, speeding up common algorithms key to real-time control systems.

The CLA allows significant offloading of common tasks from the main C28x CPU. The CLA is an independent 32-bit floating-point math accelerator that executes in parallel with the CPU. Additionally, the CLA has its own dedicated memory resources and it can directly access the key peripherals that are required in a typical control system. Support of a subset of ANSI C is standard, as are key features like hardware breakpoints and hardware task-switching.

The F28P55x supports up to 1088KB of flash memory divided into four 256KB banks plus one 64KB bank, which enable programming one bank and execution in another bank in parallel. Up to 133KB of on-chip SRAM is also available to supplement the flash memory.

The Live Firmware Update hardware enhancements on F28P55x allow fast context switching from the old firmware to the new firmware to minimize application downtime when updating the device firmware.

High-performance analog blocks are integrated on the F28P55x real-time microcontroller (MCU) and are closely coupled with the processing and PWM units to provide optimal real-time signal chain performance. Twenty-four PWM channels, all supporting frequency-independent resolution modes, enable control of various power stages from a 3-phase inverter to power factor correction and advanced multilevel power topologies.

The inclusion of the Configurable Logic Block (CLB) allows the user to add custom logic and potentially integrate FPGA-like functions into the C2000 real-time MCU.

Interfacing is supported through various industry-standard communication ports (such as SPI, SCI, I2C, PMBus, LIN, and CAN FD) and offers multiple pin-muxing options for optimal signal placement.

Want to learn more about features that make C2000 Real-Time MCUs the right choice for your real-time control system? Check out The Essential Guide for Developing With C2000™ Real-Time Microcontrollers and visit the C2000™ real-time control MCUs page.

The Getting Started With C2000™ Real-Time Control Microcontrollers (MCUs) Getting Started Guide covers all aspects of development with C2000 devices from hardware to support resources. In addition to key reference documents, each section provides relevant links and resources to further expand on the information covered.

Ready to get started? Check out the TMDSCNCD28P55X evaluation board or the LAUNCHXL-F28P55X development kit, and download C2000Ware.

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모두 보기40
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* Data sheet TMS320F28P55x Real-Time Microcontrollers datasheet PDF | HTML 2024/04/02
* Errata TMS320F28P55x Real-Time MCUs Silicon Errata PDF | HTML 2024/04/02
* User guide TMS320F28P55x Real-Time Microcontrollers Technical Reference Manual PDF | HTML 2024/04/05
Application note Power Supply and Monitoring Solution for C2000 MCU Automotive Applications PDF | HTML 2024/04/17
Application note Serial Flash Programming of C2000 Microcontrollers (Rev. H) PDF | HTML 2024/04/09
Application note C2000 Type-2 Programmable Gain Amplifier Use Cases PDF | HTML 2024/04/04
User guide Migration Between TMS320F28P5xx and TMS320F280013x/TMS320F280015x PDF | HTML 2024/04/03
User guide Migration Between TMS320F28P5xx and TMS320F28003x PDF | HTML 2024/04/02
Design guide 10-kW, Bidirectional Three-Phase Three-Level (T-type) Inverter & PFC Ref. Design (Rev. I) PDF | HTML 2023/07/07
Application note Charge-Sharing Driving Circuits for C2000 ADCs (using PSPICE-FOR-TI) (Rev. A) PDF | HTML 2023/03/24
Application note Charge-Sharing Driving Circuits for C2000 ADCs (using TINA-TI simulation tool) (Rev. A) PDF | HTML 2023/03/24
Application note Migrating Software From 8-Bit (Byte) Addressable CPU’s to C28x CPU (Rev. A) PDF | HTML 2023/03/13
Application note C2000 ePWM Developer’s Guide (Rev. A) PDF | HTML 2023/02/24
User guide Live Firmware Update Without Device Reset on C2000™ MCUs (Rev. B) PDF | HTML 2022/09/29
Application note LIN Protocol and Physical Layer Requirements (Rev. A) PDF | HTML 2022/08/24
Application note Intelligent LLC SR Control Using C2000 and UCD7138 (Rev. A) PDF | HTML 2022/06/27
Application note Implement three-phase interleaved LLC on C2000 Type-4 PWM PDF | HTML 2022/03/30
Design guide 11-kW, Bidirectional, Three-Phase ANPC Based on GaN Reference Design (Rev. A) PDF | HTML 2022/03/18
Application note C2000 Memory Power-On Self-Test (M-POST) (Rev. A) PDF | HTML 2022/03/03
Application brief Using An Op Amp for High-Side Current Sensing (Rev. A) PDF | HTML 2021/12/07
Application note C2000 SysConfig PDF | HTML 2021/10/20
Application note Getting Started with the MCAN (CAN FD) Module PDF | HTML 2021/10/20
White paper Speed Up Development With C2000™ Real-Time MCUs Using SysConfig 2021/10/20
Application note Leverage New Type ePWM Features for Multiple Phase Control PDF | HTML 2021/05/11
E-book An Engineer’s Guide to Designing with Precision Amplifiers 2021/04/29
White paper Four key design considerations when adding energy storage to solar power grids 2021/03/22
Application note CRM/ZVS PFC Implementation Based on C2000 Type-4 PWM Module PDF | HTML 2021/02/18
Application note Power Topologies in Electric Vehicle Charging Stations PDF | HTML 2020/09/16
Application note Secure BOOT On C2000 Device 2020/07/21
Application note Configurable Error Generator for Controller Area Network PDF | HTML 2019/12/19
Design guide Bidirectional, Dual Active Bridge Reference Design for Level 3 Electric Vehicle Charging Stations (Rev. E) PDF | HTML 2019/06/14
Application note Fast Integer Division – A Differentiated Offering From C2000 Product Family PDF | HTML 2019/06/14
Application note Embedded Real-Time Analysis and Response for Control Applications PDF | HTML 2019/03/29
Circuit design Inverting op amp with non-inverting positive reference voltage circuit (Rev. A) 2019/02/04
Circuit design Non-inverting op amp with inverting positive reference voltage circuit (Rev. A) 2019/02/04
White paper Maximizing power for Level 3 EV charging stations 2018/06/12
User guide Digitally Controlled Solar Micro Inverter Using C2000 MCU CCS User's Guide (Rev. B) 2017/06/09
Application note AN-20 An Applications Guide for Op Amps (Rev. C) 2013/05/01
User guide Serial Peripheral Interface (SPI) for KeyStone Devices User’s Guide (Rev. A) 2012/03/30
User guide C2000 Real-Time Control Peripheral Reference Guide (Rev. S) PDF | HTML 2001/08/30

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LAUNCHXL-F28P55X — TMS320F28P55x C2000 실시간 MCU용 LaunchPad 개발 키트

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도터 카드

TMDSHSECDOCK — HSEC180 controlCARD 베이스보드 도킹 스테이션

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디버그 프로브

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텍사스 인스트루먼트 XDS110은 TI 임베디드 프로세서를 위한 새로운 디버그 프로브(에뮬레이터)입니다. XDS110은 XDS100 제품군을 대체하면서 하나의 포드로 더 다양한 표준(IEEE1149.1, IEEE1149.7, SWD)을지원합니다. 또한 모든 XDS 디버그 프로브는 ETB(Embedded Trace Buffer)를 특징으로 하는 모든 Arm® 및 DSP 프로세서에서 코어 및 시스템 추적을 지원합니다. 핀을 통한 코어 추적의 경우 XDS560v2 PRO TRACE가 필요합니다.

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지원 소프트웨어

MATHW-3P-SLEC — MathWorks MATLAB, Simulink, C2000 마이크로컨트롤러 블록세트 및 임베디드 코더

C2000 마이크로컨트롤러 블록세트(제품 C2000 마이크로컨트롤러 블록세트 - MATLAB(mathworks.com)에 대한 링크): C2000 MCU 및 MathWorks 소프트웨어 툴과 함께 모델 기반 설계를 사용하여 설계 시간을 절약하고 생산 기간을 단축합니다.


MATLAB Coder™, Simulink Coder™ 및 Embedded Coder®는 Code Composer Studio IDE를 사용하여 Texas Instruments™ (TI) C2000 (...)

발송: MathWorks, Inc.
시뮬레이션 모델

TMS320F28P55x BSDL Files

SPRM852.ZIP (14 KB) - BSDL Model
시뮬레이션 모델

TMS320F28P55x IBIS Model

SPRM853.ZIP (827 KB) - IBIS Model
패키지 다운로드
LQFP (PZ) 100 옵션 보기
TQFP (PDT) 128 옵션 보기
UNKNOWN (PTF) 128 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

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